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Investigation of ft and non-quasi-static delay in conventional and junctionless multigate transistors using TCAD simulations


Article Information

Title: Investigation of ft and non-quasi-static delay in conventional and junctionless multigate transistors using TCAD simulations

Authors: B. Lakshmi, R. Srinivasan

Journal: ARPN Journal of Engineering and Applied Sciences

HEC Recognition History
Category From To
Y 2023-07-01 2024-09-30
Y 2022-07-01 2023-06-30
Y 2021-07-01 2022-06-30
X 2020-07-01 2021-06-30

Publisher: Khyber Medical College, Peshawar

Country: Pakistan

Year: 2012

Volume: 7

Issue: 7

Language: English

Categories

Abstract

In this paper, a comparative study between conventional and junctionless multi-gate transistors is made with respect to unity gain cut-off frequency (f<sub>t</sub>) and non-quasi static (NQS) delay using TCAD simulations. The comparison is done with and without leakage current (I<sub>OFF</sub>) matching. Two structures, typical FinFET like trigate structure and gate all around structure with circular cross section, are considered in this study. It is found that compared to junctionless transistor, conventional devices show better f<sub>t</sub> and lesser NQS delay in both trigate and GAA transistors. When the I<sub>OFF</sub> matching constraint is met by adjusting the gate electrode work function, the conventional devices show no or weak I<sub>OFF</sub> dependency due to screening effect whereas junctionless devices show strong dependency on I<sub>OFF</sub>, with respect to f<sub>t</sub> and NQS delay.


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