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FPGA implementation of a digital watermarking system for video authentication


Article Information

Title: FPGA implementation of a digital watermarking system for video authentication

Authors: Anju Devassy, Kavya Anoop

Journal: ARPN Journal of Engineering and Applied Sciences

HEC Recognition History
Category From To
Y 2023-07-01 2024-09-30
Y 2022-07-01 2023-06-30
Y 2021-07-01 2022-06-30
X 2020-07-01 2021-06-30

Publisher: Khyber Medical College, Peshawar

Country: Pakistan

Year: 2015

Volume: 10

Issue: 17

Language: English

Categories

Abstract

Digital video sequences are very vulnerable to manipulations and alterations using widely available editing tools. So some authentication techniques are needed in order to maintain authenticity, integrity, and security of digital video content. As a result, digital watermarking (WM), a data hiding technique has been considered as one of the key authentication methods. This paper presents a hardware implementation of a digital watermarking system that can insert invisible, semi-fragile watermark information into compressed video streams in real time. The watermark embedding is treated in the discrete cosine transform domain. It’s a hardware-based video authentication system using this watermarking technique structures minimum video quality degradation and can survive certain potential attacks, i.e., cover-up attacks, cropping, and segment removal on video sequences. Furthermore, the proposed hardware based watermarking system features low power consumption, low cost implementation, high processing speed, and reliability.


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