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Design of cache memory mapping techniques for low power processor


Article Information

Title: Design of cache memory mapping techniques for low power processor

Authors: R.Ramya, T.Ravi

Journal: ARPN Journal of Engineering and Applied Sciences

HEC Recognition History
Category From To
Y 2023-07-01 2024-09-30
Y 2022-07-01 2023-06-30
Y 2021-07-01 2022-06-30
X 2020-07-01 2021-06-30

Publisher: Khyber Medical College, Peshawar

Country: Pakistan

Year: 2015

Volume: 10

Issue: 11

Language: English

Categories

Abstract

The use of cache memory makes the processing of access in a faster rate. The main purpose of cache memory is to give faster memory access by which the data read should be fast and at the same period d provide less expensive and types of semiconductor memories which are of large memory size. There is correspondingly main memory which is large but slow together with a smaller as well faster cache memory. The cache memory contains a copy of instruction from main memory. The processor when it needs to read from or write to in the main memory locations, it first checks whether the cache memory contains the required data. This paper presents a two level cache in which the splitting of cache level is used by which faster access time and low power consumption can be achieved. The main focus of this project is reduced access time and power consumption.


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