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Effect of leakage power reduction techniques on combinational circuits

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Title: Effect of leakage power reduction techniques on combinational circuits

Authors: M. Manoranjani, T. Ravi, R. Ramya

Journal: ARPN Journal of Engineering and Applied Sciences

HEC Recognition History
Category From To
Y 2023-07-01 2024-09-30
Y 2022-07-01 2023-06-30
Y 2021-07-01 2022-06-30
X 2020-07-01 2021-06-30

Publisher: Khyber Medical College, Peshawar

Country: Pakistan

Year: 2015

Volume: 10

Issue: 7

Language: English

Categories
Computer Science (14978) Electrical Engineering (5972) Power Management (15) VLSI Design (122) Semiconductor Devices (49)

Abstract

This paper deals with power dissipation in digital circuits. Effect of leakage power reduction techniques are deal with digital circuit design. Analyses of these techniques are done in MICROWIND environment. Power dissipation of these techniques is calculated and compared with conventional design. The layouts are designedusingMicrowind. The simulation outputs are taken and observed. Power dissipation of the circuits are tabulated and compared.

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