DefinePK

Abstract

Low power and high speed adders are the most essential components of every contemporary signal processing applications. Among the many adders, Carry Save Adder (CSA) is the high speed multi operand adder used in many applications. This paper presents the design of low power and high speed Carry Save Adder with reduced no. of transistors using Modified Gate Diffusion Input (MGDI) technique. This technique has been adopted from Gate Diffusion Input Technique (GDI) and is used achieve reduced power consumption, delay and area of digital circuits, while maintaining low complexity of logic design. This paper aims at designing of 4 operand 8 bit and 16 bit CSA using conventional CMOS, GDI and MGDI techniques. After various performance comparisons, it is stated that total power dissipation, propagation delay and transistor count are much smaller in MGDI technique than compared to CMOS and GDI technique.