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A literature survey on CPU cache reconfiguration

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Title: A literature survey on CPU cache reconfiguration

Authors: S. Subha

Journal: ARPN Journal of Engineering and Applied Sciences

HEC Recognition History
Category From To
Y 2023-07-01 2024-09-30
Y 2022-07-01 2023-06-30
Y 2021-07-01 2022-06-30
X 2020-07-01 2021-06-30

Publisher: Khyber Medical College, Peshawar

Country: Pakistan

Year: 2016

Volume: 11

Issue: 5

Language: English

Categories
Computer Engineering (1270) Computer Architecture (114) VLSI Design (122) Hardware Design (19) Performance Analysis (137)

Abstract

CPU caches are designed with fixed number of sets, associativity and line size. Some methods are proposed in the literature for certain combinations of variable cache sets, variable cache ways, variable cache lines. This paper gives a survey of significant results in this regard.

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