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Title: A literature survey on CPU cache reconfiguration
Authors: S. Subha
Journal: ARPN Journal of Engineering and Applied Sciences
Publisher: Khyber Medical College, Peshawar
Country: Pakistan
Year: 2016
Volume: 11
Issue: 5
Language: English
CPU caches are designed with fixed number of sets, associativity and line size. Some methods are proposed in the literature for certain combinations of variable cache sets, variable cache ways, variable cache lines. This paper gives a survey of significant results in this regard.
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