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Optimization of SPI controller for hardware embedded systems using finite state machines


Article Information

Title: Optimization of SPI controller for hardware embedded systems using finite state machines

Authors: Edwar Jacinto G., Fernando Martinez S., Holman Montiel A.

Journal: ARPN Journal of Engineering and Applied Sciences

HEC Recognition History
Category From To
Y 2023-07-01 2024-09-30
Y 2022-07-01 2023-06-30
Y 2021-07-01 2022-06-30
X 2020-07-01 2021-06-30

Publisher: Khyber Medical College, Peshawar

Country: Pakistan

Year: 2018

Volume: 13

Issue: 22

Language: English

Categories

Abstract

This article shows the design and implementation of a finite state machine that describes the operation of the SPI protocol in a standard way, which is a serial protocol used for transfers with peripherals with low / medium bandwidth, all the technical detail of a specific application, and emphasis is placed on making a description with a low level of abstraction to reduce the amount of hardware resource used, arriving at a general-purpose IP CORE type solution. The state machine controls the sequence of the communication that comply with the protocol. By having a design of low complexity, it achieves to be easily adaptable for a number of plates (shields) that proliferate in a significant number of academic and commercial applications.


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