DefinePK

Abstract

As miniaturization of conventional MOSFETs leading to its scaling limits, novel nano-scale devices are studied and developed. To improve Ion/Ioff ratio gate controllable wrap-around gate CNTFETs are recently investigated. The Gate-All-Around (GAA) CNTFET is one of the best types of CNTFETs which gives the environment for technological scaling beyond 10 nm because of its electrical and physical properties. In nano-scale device design, ultra thin body with GAA-CNTFET is an ideal choice to improve the performance. As device dimensions minimizes, new processing steps increases the source of variation. To address these issues during scaling, there is a necessity for device engineering and new nano devices based on different principles of physics. In this paper, we have studied the effect of diameter, chiral vector, Gate oxide thickness, different dielectric material constant, number of CNTs on threshold voltage (Vth). It is observed that chiral vector (n,0) with increasing values of n is more sensitive towards reduction in threshold voltage and also in our simulation it is analysed that when the number of CNTs are equal to N, drain current increases in the same order. In addition to this, the effects of quantum capacitance on these parametric variations have also been plotted. From the simulation, we analysed that chiral vector is very crucial parameter for CNTFET devices to control threshold voltage of the transistor.