DefinePK

Abstract

According to the importance of using hardware implementation for digital image processing to gain performance with high quality; this paper produces some basic techniques to enhance images with their hardware implementation and results using the VHDL and mega Core modules. The paper focuses on exploring the parallelism features on FPGA to perform image enhancement in the spatial parallelism, by applying spatial parallelism to design and build embedded real time system. The FPGAs reconfigurable make them very suitable choice for real-time image processing to implement many enhancement algorithms to get fast computation. It utilizes of parallel on-chip registers and memory enhanced the processing time of implemented algorithms. An FPGA development Board DE2-115 is used as vehicle project. The results of implemented design show that the throughput is increased in term of coarse-grain scale and reduce the power consumption. Also, the operating frequency is increased to 1GHz by configuring Phase-Locked Loop (PLL). As well as the possibility to implement several algorithms using the same Hardwar, only reconfigurable it.