DefinePK

Abstract

Multi voltage clustered systems are the basic and vital power decrease techniques, these approaches employs Level shifters to interconnect “Multiple voltage domains” to reduce power in core/module level. The Level Shifter may considered as area, power and delay overheads when its own power, delays are high. We proposed a circuit technique with broad shifting range for Nanoscale applications. In this brief, for minimization of current contention to attain both efficient and robust level shifting, we introduced new LS with series of Diode current limiters, which minimizes the dynamic power and propagation delay. Implementation of the LS in 130nm technology makes the proposed LS in accomplishing both efficient and robust level shifting from deep sub-threshold voltage 0.15V to supply voltage 1.25V. The developed LS have attained an average propagation delay of 6.20ns, Energy efficiency of 26.5fJ.