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Passive Neighborhood Pattern Sensitive Fault testing in memories using LCA and LFSR


Article Information

Title: Passive Neighborhood Pattern Sensitive Fault testing in memories using LCA and LFSR

Authors: K. L. V. Ramana Kumari, M. Asha Rani, N. Balaji

Journal: ARPN Journal of Engineering and Applied Sciences

HEC Recognition History
Category From To
Y 2023-07-01 2024-09-30
Y 2022-07-01 2023-06-30
Y 2021-07-01 2022-06-30
X 2020-07-01 2021-06-30

Publisher: Khyber Medical College, Peshawar

Country: Pakistan

Year: 2022

Volume: 17

Issue: 9

Language: English

Categories

Abstract

Neighborhood Pattern Sensitive Fault (NPSF) is the typical fault which occurs due to the coupling action among neighbouring cells in the memory. Other faults like stuck at faults, address decoder faults can be detected using March Algorithms, but Neighborhood pattern sensitive faults can’t be detected easily. So, there is a need for the improvisation of fault detection in memories for NPS Faults. This paper proposes a new approach for testing of passive NPSF (PNPSF) in memories. This approach comprises of a Hamiltonian and Gray sequences for non-optimized and optimized techniques used for PNPSF detection with Linear Cellular Automata (LCA) and Linear Feedback Shift Register (LFSR) as address generators. A 3-cell neighborhood approach is considered for the testing of PNPSF, which has one base cell and corresponding neighborhood left cell and right cell. The complete test setup using this approach will configure the PNPSF impact on base cell due to transitions in the corresponding neighborhood cells. The comparison of the timing and fault insertion analysis of all four PNPSF testing approaches are tabulated, also the optimized sequence gives better fault coverage than non-optimized Hamiltonian and Gray sequence. The proposed methods of PNPSF architecture for memory testing is synthesized and implemented using Xilinx 14.7.


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