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Design of two-stage operational amplifier by using artificial bee colony algorithm


Article Information

Title: Design of two-stage operational amplifier by using artificial bee colony algorithm

Authors: E. Srinivas, G. Sairam

Journal: ARPN Journal of Engineering and Applied Sciences

HEC Recognition History
Category From To
Y 2023-07-01 2024-09-30
Y 2022-07-01 2023-06-30
Y 2021-07-01 2022-06-30
X 2020-07-01 2021-06-30

Publisher: Khyber Medical College, Peshawar

Country: Pakistan

Year: 2022

Volume: 17

Issue: 3

Language: English

Categories

Abstract

A two-stage operational amplifier is designed in this paper by using artificial bee colony algorithm. The aim is to minimize the MOS transistor size by using artificial bee colony (ABC) algorithm to allow automated synthesis of analog systems. This proposed methodology is used to find the optimal dimensional parameters (length and width) in order to obtain operational amplifier performances for analog CMOS (complementary metal oxide semiconductor) based circuit applications. A few parameters are considered in this study, direct current (DC), unity-gain bandwidth (GBW), phase margin (PM), power consumption (P), slew rate (SR), and area (A) using the MATLAB optimization toolbox to implement the program. Also, by using variables obtained from ABC algorithm, the two-stage operational amplifier is simulated by using cadence virtuoso spectra circuit simulator in standard GPDK 180nm CMOS technology. A good agreement is observed between the program optimization and electric simulation.


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