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Design of Low Power Low voltage CMOS Amplifiers in Subthreshold region


Article Information

Title: Design of Low Power Low voltage CMOS Amplifiers in Subthreshold region

Authors: L. Premalatha, P. Kavi Priya M. E.

Journal: ARPN Journal of Engineering and Applied Sciences

HEC Recognition History
Category From To
Y 2023-07-01 2024-09-30
Y 2022-07-01 2023-06-30
Y 2021-07-01 2022-06-30
X 2020-07-01 2021-06-30

Publisher: Khyber Medical College, Peshawar

Country: Pakistan

Year: 2016

Volume: 11

Issue: 15

Language: English

Categories

Abstract

The growing demand of portable electronics equipment makes the circuit designer think about low power low voltage integrated circuit design. The major drawback on implementing strong inversion low-voltage CMOS circuits is the threshold voltage which does not scale down as the same rate as compared to the power supply. Hence the design of electronic circuits operated in subthreshold region has become an absolutely necessary feature in order to provide efficient benefits by technology scaling. This Project focuses on the weak inversion design of low power low voltage Inverter, Nand gate, common source amplifier, Differential amplifier and Operational Transconductance Amplifier (OTA). The CMOS OTA is designed in 350 nm CMOS TSMC process technology and BSIM 3v3 SPICE model and obtained 66db gain, 61 degree phase margin with 160nW power consumption by applying 0.9V supply voltage. In design of CMOS OTA TANNER EDA TOOL is used.


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