Research Papers: Low Power Design (37)

37 Papers found for "Low Power Design (37)"

Read Paper

Design of novel low power (NLP) SRAM Cell for wireless sensor network applications

C. M. R. Prabhu, Lim Way Soong, Sargunam T. G.

ARPN Journal of Engineering and Applied Sciences | 2021

Read Paper

Design and development of active power filter for harmonic minimization using synchronous reference frame (SRF)

Marizan Sulaiman, Mohammed Rasheed, Rosli Omar, Zheng Kai Low

ARPN Journal of Engineering and Applied Sciences | 2019

Read Paper

Low-power SRAM cell for efficient leakage energy reduction in deep submicron using 0.022 µm CMOS technology

K. Babulu, M. Madhusudhan Reddy, M. Sailaja

ARPN Journal of Engineering and Applied Sciences | 2018

Read Paper

Low power custom circuit building using standard cells with reduced leakage by applying Gate Length Biasing technique for high end computing applications

Sakthivel R., Sathiyanarayanan Kuppuswamy

ARPN Journal of Engineering and Applied Sciences | 2018

Read Paper

Intend of power-delay optimized Kogge Stone based Carry Select Adder

P. Manimegalai, Prajoona Valsalan

ARPN Journal of Engineering and Applied Sciences | 2018

Read Paper

Power efficient Wallace tree multiplier using Full Swing Gate Diffusion Input technique

Anitha Juliette Albert, Mohammed Farook, Seshasayanan Ramachandran, Syed Mustafaa

ARPN Journal of Engineering and Applied Sciences | 2018

Read Paper

An approach towards optimised low power nanoscale Reversible decoder using Quantum-Dot cellular Automata

R. Amutha, R. Jayalakshmi

ARPN Journal of Engineering and Applied Sciences | 2018

Read Paper

High efficient DC-DC converter for portable device

B. Yogeshwaran, G. Rohini, K. Surendra Kumar, S. Vaishnavi

ARPN Journal of Engineering and Applied Sciences | 2018

Read Paper

Novel 11-T full adder in 65nm CMOS technology

C. M. R. Prabhu, Tan Wee Xin Wilson, Thangavel Bhuvaneswari

ARPN Journal of Engineering and Applied Sciences | 2018

Read Paper

DefinePK

Categories

37 Papers found for "Low Power Design (37)"

An ultra-low power tunnel FET based OTA design for neural amplifier

Design of novel low power (NLP) SRAM Cell for wireless sensor network applications

Design and development of active power filter for harmonic minimization using synchronous reference frame (SRF)

Low-power SRAM cell for efficient leakage energy reduction in deep submicron using 0.022 µm CMOS technology

Low power custom circuit building using standard cells with reduced leakage by applying Gate Length Biasing technique for high end computing applications

Intend of power-delay optimized Kogge Stone based Carry Select Adder

Power efficient Wallace tree multiplier using Full Swing Gate Diffusion Input technique

An approach towards optimised low power nanoscale Reversible decoder using Quantum-Dot cellular Automata

High efficient DC-DC converter for portable device

Novel 11-T full adder in 65nm CMOS technology

DefinePK

Select Collection

Categories

37 Papers found for "Low Power Design (37)"