DefinePK

Abstract

The working of the CODEC circuit is to run the battery based portable devices with some of the design constraints, and thereby improving the designing metrics like power, area. The present work object at designing a combined encoder and decoder circuits (CODEC) which is useful in low power devices by modifying the delay buffer, clock gating circuits, multiple bus width consider as single bus width of the encoding and decoding circuits. The synthesis, digital fabricated physical design implemented in SOC encounter tool using 45nm technology. Comparisons were made between the 32 bit and 64 bit codec designs with power, area, timing and error estimation. Results are procured exposition a high performance improvement in the conventional CODEC system when compared with design metrics and power consumption.