DefinePK

Abstract

BIST, Built In Self Test is a mechanism that is used to test itself the high reliability and low repair cyclic times .It is used to reduce complexity of the circuit it also reduces the cost and decreases the external test equipment. There are different powers gating techniques which are applied to the BIST architecture. In this paper an efficient BIST architecture is implemented using two different power gating schemes namely dual sleep approach and tri mode logic. Dual sleep approach reduces the power consumption and dealy, in this technique main advantage is using extra pull up and pull down transistors while sleep state either ON or OFF. Tri mode technique is reduces power, in this technique used virtual VDD and virtual VSS instead of normal VDD and VSS. From sleep to active at that time power consumption is more, by adding intermediate mode leakage power reduced. The simulation results show the comparison of these two techniques and give a better low power BIST architecture.