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Design and analysis of partition technique based Dadda multiplier architecture

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Title: Design and analysis of partition technique based Dadda multiplier architecture

Authors: D. Kalaiyarasi, T. Suguna, C. Padma, C. Nalini, M. Sundar Raj, G. Nagarajan

Journal: ARPN Journal of Engineering and Applied Sciences

HEC Recognition History
Category From To
Y 2023-07-01 2024-09-30
Y 2022-07-01 2023-06-30
Y 2021-07-01 2022-06-30
X 2020-07-01 2021-06-30

Publisher: Khyber Medical College, Peshawar

Country: Pakistan

Year: 2025

Volume: 20

Issue: 3

Language: English

Categories
Arithmetic Circuits (19) Computer Engineering (1270) Dadda Multiplier (1) Partition Technique (1) VLSI Design (122)

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